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Position information:

 

1. Master degree or above, major in microelectronics / Electronics

 

2. More than five years experience in relevant meomry such as sram/rom/tcam

 

3. at least two memory compiler silicon proven experience

 

4. the experience in 28nm/22nm/14nm/12nm/7nm/5nm design is better

 

5. good English reading and writing skills

 

6. have a sense of responsibility and strong learning ability

 

Responsibilities:

 

1. responsible for memory compiler circuit design, simulation verification, timing/power data extraction, using code, database verification

 

2. responsible for layout guide and layout check

 

2. responsible for customer requirements definition and IP delivery

Position information

 

Responsibilities:

 

1. Responsible for the design and implementation of SRAM testchip digital front end, logic synthesis, timing analysis

 

2. Responsible for SRAM testchip project management

 

3. Assist in chip testing

 

4. Improve the process and specification of chip design and test

 

Requirements:

 

1. Solid knowledge of digital circuit;

 

2. Proficient in Verilog language, proficient in the use of simulation and logic integrated EDA tools;

 

3. The following related experience is preferred: independent SRAM / standard cell / GPIO test chip design;

 

4. Excellent professional quality, good communication and coordination ability, good team spirit and cooperation spirit

Position information:

 

1. Master degree or above, major in microelectronics / electronics

 

2. More than one year working experience

 

3. Familiar with digital circuit design

 

4. Memory design experience is preferred

 

5. Good English reading and writing skills

 

6. Have a sense of responsibility and strong learning ability

 

Responsibilities:

 

1. Participate in memory compiler circuit design, simulation verification, timing / power data extraction, tiling code, database verification

 

2. Participate in customer requirement definition and IP delivery

Position information

 

1. College degree or above, major in computer / electronics;

 

2. More than one year working experience in layout;

 

3. Skillfully use IC layout design tools;

 

4. Proficient in DRC / LVS verification and debug;

 

5. Design layout module independently;

 

6. Memory compiler design experience is preferred;

 

7. Good English reading and writing skills;

 

8. Strong sense of responsibility and learning ability.

 

Responsibilities:

 

1. Participate in SRAM / memory compiler layout drawing, verification and parameter extraction;

 

2. Participate in the design of SRAM testchip;

 

3. Cooperate with circuit design engineer to complete layout optimization

 

Function category: Layout Design Engineer

 

Key words: sramrom layout memory compiler